mov ax, 320; 2 cyclesmul word [row]; 22 CPU Cyclesmov di,ax; 2 cyclesadd di, [column]; 2 cycles; di = [row]*320 + [column]
; 16-bit addressing mode limitations:; [di] is a valid addressing mode, but [ax] isn't, otherwise we could skip the last mov
imul edi, [row], 320 ; 3 cycle latency from [row] being readyadd edi, [column] ; 1 cycle latency (from [column] and edi being ready).; edi = [row]*(256+64) + [column], in 4 cycles from [row] being ready.
vs.
mov edi, [row]shl edi, 6 ; row*64. 1 cycle latencylea edi, [edi + edi*4] ; row*(64 + 64*4). 1 cycle latencyadd edi, [column] ; 1 cycle latency from edi and [column] both being ready; edi = [row]*(256+64) + [column], in 3 cycles from [row] being ready.
# Basic bit operations# Integer to binaryprint(bin(10))
# Binary to integerprint(int('1010', 2))
# Multiplying x with 2 .... x**2 == x << 1print(200 << 1)
# Dividing x with 2 .... x/2 == x >> 1print(200 >> 1)
# Modulo x with 2 .... x % 2 == x & 1if 20 & 1 == 0:print("20 is a even number")
# Check if n is power of 2: check !(n & (n-1))print(not(33 & (33-1)))
# Getting xth bit of n: (n >> x) & 1print((10 >> 2) & 1) # Bin of 10 == 1010 and second bit is 0
# Toggle nth bit of x : x^(1 << n)# take bin(10) == 1010 and toggling second bit in bin(10) we get 1110 === bin(14)print(10^(1 << 2))